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july 2000 preliminary ML4832 * electronic dimming ballast controller general description the ML4832 is a complete solution for a dimmable/non- dimmable, high power factor, high efficiency electronic ballast. the bicmos ML4832 contains controllers for boost type power factor correction as well as for a dimming ballast. the power factor circuit uses the average current sensing method with a gain modulator and overvoltage protection. this system produces a power factor of better than 0.99 with low input current thd at > 95% efficiency. special care has been taken in the design of the ML4832 to increase system noise immunity by using a high amplitude oscillator, and a current-fed multiplier. an overvoltage protection comparator inhibits the pfc section in the event of a lamp out or lamp failure condition. the ballast section provides for programmable starting scenarios with programmable preheat and lamp out-of- socket interrupt times. the ic controls lamp output through frequency modulation using lamp current feedback. features n complete power factor correction and dimming ballast control in one ic n low distortion, high efficiency continuous boost, average current sensing pfc section n programmable start scenario for rapid or instant start lamps n lamp current feedback for dimming control n variable frequency dimming and starting n programmable restart for lamp out condition to reduce ballast heating n over-temperature shutdown replaces external heat sensor for safety n pfc overvoltage comparator eliminates output runaway due to load removal n large oscillator amplitude and gain modulator improves noise immunity n low start-up current <0.5ma block diagram 7 r set variable frequency oscillator 8 r t /c t 10 r x /c x pre-heat and interrupt timers control & gating logic 2 ia out 4 ia+ power factor controller under-voltage and thermal shutdown output drivers 3 i sine 1 ea out 18 eaC/ovp v ref 17 pfc out 15 gnd 11 v cc 16 pgnd 12 out b 13 out a 14 lfb out 6 lamp fb 5 interrupt 9 (* indicates part is end of life as of july 1, 2000) rev. 1.0 10/12/2000
ML4832 2 rev. 1.0 10/12/2000 pin configuration pin# name function pin# name function 1 ea out pfc error amplifier output and compensation node 2 ia out output and compensation node of the pfc average current transconductance amplifier 3i sine pfc gain modulator input 4 ia+ non-inverting input of the pfc average current transconductance amplifier and peak current sense point of the pfc cycle by cycle current limit comparator 5 lamp fb inverting input of an error amplifier used to sense (and regulate) lamp arc current. also the input node for dimming control. 6 lfb out output from the lamp current error transconductance amplifier used for lamp current loop compensation 7r set external resistor which sets oscillator f max , and r x /c x charging current 8r t /c t oscillator timing components pin description 9 interrupt input used for lamp-out detection and restart. a voltage greater than 7.5 volts resets the chip and causes a restart after a programmable interval. 10 r x /c x sets the timing for the preheat, dimming lockout, and interrupt 11 gnd ground 12 p gnd power ground for the ic 13 out b ballast mosfet drive output 14 out a ballast mosfet drive output 15 pfc out power factor mosfet drive output 16 v cc positive supply for the ic 17 v ref buffered output for the 7.5v voltage reference 18 eaC/ovp inverting input to pfc error amplifier and ovp comparator input ea out ia out i sine ia+ lamp fb lfb out r set r t /c t interrupt eaC/ovp v ref v cc pfc out out a out b p gnd gnd r x /c x 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 top view ML4832 18-pin dip (p18) eaC/ovp v ref v cc pfc out out a out b p gnd gnd r x /c x ea out ia out i sine ia+ lamp fb lfb out r set r t /c t interrupt 18 17 16 15 14 13 12 11 10 1 2 3 4 5 6 7 8 9 top view ML4832 18-pin soic (s18)
ML4832 rev. 1.0 10/12/2000 3 electrical characteristics unless otherwise specified, r set = 22.1k w , r t = 15.8kw, c t = 1.5nf, c(v cc ) = 1f, i sine = 200a, v cc = 12.5v, t a = operating temperature range (note 1) parameter conditions min typ max units pfc current sense amplifier small signal transconductance 40 90 120 w output low i sine = 0ma, v ea out = 0v, v ia+ = C0.3v, r l = 0.2 0.4 v output high i sine = 1.5ma, 6.3 6.8 v v eaC/ovp = v ia+ = 0v, r l = source current i sine = 1.5ma, C0.05 C0.15 C0.25 ma v eaC/ovp = v ia+ = 0v, v ia out = 6v, t j = 25oc sink current i sine = 0ma, v ia out = 0.3v, v ia+ = C0.6v v ea out = 0v, v eaC/ovp = 5v, t j = 25oc 0.03 0.07 0.16 ma pfc voltage feedback amplifier/lamp current amplifier input bias current C0.3 C1.0 a small signal transconductance 30 55 90 w input voltage range C0.3 5.0 v output low v lamp fb = v eaC/ovp = 3v, r l = 0.2 0.4 v output high v lamp fb = v eaC/ovp = 2v, r l = 7.1 7.5 7.8 v source current v lamp fb = v eaC/ovp = 0v, C0.06 C0.15 C0.30 ma v ea out = v lfb out = 7v, t j = 25oc sink current v lamp fb = v eaC/ovp = 5v, 0.06 0.12 0.28 ma v ea out = v lfb out = 0.3v, t j = 25oc absolute maximum ratings absolute maximum ratings are those values beyond which the device could be permanently damaged. absolute maximum ratings are stress ratings only and functional device operation is not implied. supply current (i cc ) ............................................... 60ma output current, source or sink (out a, out b, pfc out) dc ................................................................... 250ma output energy (capacitive load per cycle) ............... 1.5mj gain modulator i sine input ..................................... 10ma analog inputs ....................................... C0.3v to v cc C2v ia+ input voltage .............................................. C3v to 2v maximum forced voltage (ea out, lfb out) ................................ C0.3v to 7.7v maximum forced current (ea out, ia out, lfb out) ............................ 20ma maximum forced voltage (ia out) ................................................. C0.3v to 7.5v junction temperature ............................................. 150c storage temperature range ...................... C65c to 150c lead temperature (soldering 10 sec.) ..................... 260c thermal resistance ( q ja ) plastic pdip ..................................................... 70c/w plastic soic ................................................... 100c/w operating conditions temperature range ML4832c .................................................. 0c to 85c
ML4832 4 rev. 1.0 10/12/2000 electrical characteristics (continued) parameter conditions min typ max units gain modulator output voltage (v mul )i sine = 100a, v ea out = 3v 85 mv i sine = 300a, v ea out = 3v 260 mv i sine =100a, v ea out = 6v 200 mv i sine = 300a, v ea out = 6v 600 mv output voltage limit i sine = 1.5ma, v eaC/ovp = 0v 0.9 1 1.1 v offset voltage i sine = 0a, v eaC/ovp = 0v 15 mv i sine = 150a, v eaC/ovp = 3v 15 mv i sine input voltage i sine = 200a 0.8 1.4 1.8 v pfc current limit comparator current-limit threshold C0.85 C1.0 C1.15 v propagation delay 100mv step and 100mv overdrive 100 ns oscillator initial accuracy t a = 25c 72 76 80 khz voltage stability v ccz C 4.0v < v cc < v ccz C 0.5v 1 % temperature stability 2% total variation line, temperature 69 83 khz ramp valley to peak 2.5 v c t charging current v lamp fb = 3v, v rt/ct = 2.5v, v rx/cx = 0.9v (preheat) C90 C113 C130 a v lamp fb = 3v, v rt/ct = 2.5v, rx/cx = open C180 C230 C260 a c t discharge current v rt/ct = 2.5v 4.0 5.5 7.0 ma output drive deadtime 0.64 0.91 1.30 s reference section output voltage t a = 25c, i o = 1ma 7.4 7.5 7.6 v line regulation v ccz C 4.0v < v cc < v ccz C 0.5v 8 25 mv load regulation 1ma < i o < 5ma 2 15 mv temperature stability 0.4 % total variation line, load, temp 7.35 7.65 v output noise voltage 10hz to 10khz 50 v long term stability t j = 125c, 1000 hrs 5 mv preheat and interrupt timer (r x = 680k w w w w w , c x = 4.7f) initial preheat period 0.8 s subsequent preheat period 0.7 s start period 1.2 s interrupt period 5.7 s pin 10 charging current C24 C28 C33 a
ML4832 rev. 1.0 10/12/2000 5 electrical characteristics (continued) parameter conditions min typ max units preheat and interrupt timer (r x = 680k w w w w w , c x = 4.7f) continuied pin 10 open circuit voltage v cc < start-up threshold 0.4 0.7 1.0 v pin 10 maximum voltage 7.0 7.3 7.7 v input bias current v rx/cx = 1.2v 0.1 a preheat lower threshold 1.05 1.22 1.36 v preheat upper threshold 4.4 4.77 5.15 v interrupt recovery threshold 1.05 1.22 1.36 v start period end threshold 6.05 6.6 7.35 v interrupt input interrupt threshold 7.15 7.4 7.65 v input bias current 0.1 a r set voltage 2.4 2.5 2.6 v ovp comparator ovp threshold 2.65 2.75 2.85 v hysteresis 0.20 0.25 0.27 v propagation delay 1.4 s outputs output voltage low i out = 20ma 0.1 0.2 v i out = 200ma 1.0 2.0 v output voltage high i out = C20ma v cc C 0.2 v cc C 0.1 v i out = C200ma v cc C 2.0 v cc C 1.0 v output voltage low in uvlo i out = 10ma, v cc 8v 0.2 v output rise/fall time c l = 1000pf 20 ns under-voltage lockout and bias circuits ic shunt voltage (v ccz )i cc = 15ma 14.2 15.0 15.8 v start-up current v cc = start-up threshold C0.2v 0.34 0.48 ma operating current v cc = 12.5v, v ia+ = 0v, 5.5 8.0 ma v eaC/ovp = v lamp fb = 2.3v, ia out = open r t = 16.2k w , r set = 22.1k w v cc = 12.5v, c l = 0 start-up threshold v cc C 1.2 v ccz C 1.0 v cc C 0.8 v shutdown threshold v cc C 5.5 v ccz C 5.0 v cc C 4.5 v shutdown temperature (t j ) 120 c hysteresis (t j ) 30 c note 1: limits are guaranteed by 100% testing, sampling or correlation with worst case test conditions.
ML4832 6 rev. 1.0 10/12/2000 functional description overview the ML4832 consists of an average current controlled continuous boost power factor front end section with a flexible ballast control section. start-up and lamp-out retry timing are controlled by the selection of external timing components, allowing for control of a wide variety of different lamp types. the ballast section controls the lamp power using frequency modulation (fm) with additional programmability provided to adjust the vco frequency range. this allows for the ic to be used with a variety of different output networks. power factor section the ML4832 power factor section is an average current sensing boost mode pfc control circuit which is architecturally similar to that found in the ml4821. for detailed information on this control architecture, please refer to application note 16 and the ml4821 data sheet. figure 1. ML4832 block diagram gain modulator the ML4832 gain modulator provides high immunity to the disturbances caused by high power switching. the rectified line input sine wave is converted to a current via a series resistor. in this way, small amounts of ground noise produce an insignificant effect on the reference to the pwm comparator. the output of the gain modulator appears on the positive terminal of the ia amplifier to form the reference for the current error amplifier. please refer to figure 1. v i ma mul sine vea v = - 07 34 . . bg (1) where: i sine is the current in the dropping resistor, vea is the output of the error amplifier (pin 1). the output of the gain modulator is limited to 1.0v. 7 r set r x /c x v cc v ref gnd ia out ia + Cv mul + i sine ea out ea C/ovp 10 16 17 11 2 4 3 1 18 out b 13 + C + C + C C + C + 2.5v 2.5v v ref C1v preheat timer variable frequency osc under-voltage and thermal shutdown C + s r q t q q p gnd 12 out a 14 pfc out 15 r t /c t 8 interrupt 9 lfb out 6 lamp fb 5 C + 2.75v 7k pwm (pfc) ovp 7k gain modulators
ML4832 rev. 1.0 10/12/2000 7 average current and output voltage regulation the pwm regulator in the pfc control section will act to offset the positive voltage caused by the multiplier output by producing an offsetting negative voltage on the current sense resistor at ia+. a cycle-by-cycle current limit is included to protect the mosfet from high speed current transients. when the voltage at ia+ goes negative by more than 1v, the pwm cycle is terminated. for more information on compensating the average current and boost voltage error amplifier loops, see ml4821 data sheet. overvoltage protection and inhibit the ovp pin serves to protect the power circuit from being subjected to excessive voltages if the load should change suddenly (lamp removal). a divider from the high voltage dc bus sets the ovp trip level. when the voltage on eaC/ovp exceeds 2.75v, the pfc transistors are inhibited. the ballast section will continue to operate. transconductance amplifiers the pfc voltage feedback, pfc current sense, and the loop current amplifiers are all implemented as operational transconductance amplifiers. they are designed to have low small signal forward transconductance such that a large value of load resistor (r1) and a low value ceramic capacitor (<1f) can be used for ac coupling (c1) in the frequency compensation network. the compensation network shown in figure 2 will introduce a zero and a pole at: f rc f rc zp == 1 2 1 2 11 12 pp (2) figure 3 shows the output configuration for the operational transconductance amplifiers. a dc path to ground or v cc at the output of the transconductance amplifiers will introduce an offset error. C + 18 2.5v r1 c1 c2 figure 2. compensation network current mirror in out current mirror in out gmv in io = gmv in iq + 2 gmv in iq C 2 v in differential linear slope region 0 i o figure 3. output configuration figure 4. transconductance amplifier characteristics functional description (continued)
ML4832 8 rev. 1.0 10/12/2000 the magnitude of the offset voltage that will appear at the input is given by v os = io/gm. for an io of 1ma and a gm of 0.05 mhos the input referred offset will be 20mv. capacitor c1 as shown in figure 2 is used to block the dc current to minimize the adverse effect of offsets. slew rate enhancement is incorporated into all of the operational transconductance amplifiers in the ML4832. this improves the recovery of the circuit in response to power up and transient conditions. the response to large signals will be somewhat non-linear as the transconductance amplifiers change from their low to high transconductance mode. this is illustrated in figure 4. ballast output section the ic controls output power to the lamps via frequency modulation with non-overlapping conduction. this means that both ballast output drivers will be low during the discharging time t dis of the oscillator capacitor c t . oscillator the vco frequency ranges are controlled by the output of the lfb amplifier. as lamp current decreases, lfb out rises in voltage, causing the c t charging current to decrease, thereby causing the oscillator frequency to decrease. since the ballast output network attenuates high frequencies, the power to the lamp will be increased. the oscillator frequency is determined by the following equations: f tt osc chg dis = + 1 (3) and trcin virv virv chg t t ref ch t tl ref ch t th = +- +- f h g i k j (4) the oscillators minimum frequency is set when i ch = 0 where: f rc osc tt @ 1 051 . (5) this assumes that t chg >> t dis . when lfb out is high, i ch = 0 and the minimum frequency occurs. the charging current varies according to two control inputs to the oscillator: 1. the output of the preheat timer 2. the voltage at lfb out in preheat condition, charging current is fixed at i r chg preheat set () . = 25 (6) 17 + C 1.25/3.75 8 c t v ref i chg v ref control r t /c t r t 5.5ma clock c t v th = 3.75v v tl = 1.25v t dis t chg figure 5. oscillator block diagram and timing functional description (continued)
ML4832 rev. 1.0 10/12/2000 9 in running mode, charging current decreases as the v pin6 rises from 0v to v oh of the lamp fb amplifier. the highest frequency will be attained when i chg is highest, which is attained when lfb out is at 0v: i r chg set () 0 5 = (7) highest lamp power, and lowest output frequency are attained when lfb out is at its maximum output voltage (v oh ). in this condition, the minimum operating frequency of the ballast is set per (5) above. for the ic to be used effectively in dimming ballasts with higher q output networks a larger c t value and lower r t value can be used, to yield a smaller frequency excursion over the control range (v lfb out ). the discharge current is set to 5.5ma. assuming that i dis >> i rt : tc dis vco t () @ 600 (8) ic bias, under-voltage lockout and thermal shutdown the ic includes a shunt regulator which will limit the voltage at v cc to 15v (v ccz ). the ic should be fed with a current limited source, typically derived from the ballast transformer auxiliary winding. when v cc is below v ccz C 1.1v, the ic draws less than 0.48ma of quiescent current and the outputs are off. this allows the ic to start using a bleed resistor from the rectified ac line. to help reduce ballast cost, the ML4832 includes a temperature sensor which will inhibit ballast operation if the ics junction temperature exceeds 120c. in order to use this sensor in lieu of an external sensor, care should be taken when placing the ic to ensure that it is sensing temperature at the physically appropriate point in the ballast. the ML4832s die temperature can be estimated with the following equation: tt p cw jad @ 65 / (9) starting, re-start, preheat and interrupt the lamp starting scenario implemented in the ML4832 is designed to maximize lamp life and minimize ballast heating during lamp out conditions. the circuit in figure 7 controls the lamp starting scenarios: filament preheat and lamp out interrupt. c x is charged with a current of i rset /4 and discharged through r x . the voltage at c x is initialized to 0.7v (v be ) at power up. the time for c x to rise to 4.8v is the filament preheat time. during that time, the oscillator charging current (i chg ) is 2.5/r set . this will produce a high frequency for filament preheat, but will not produce sufficient voltage to ignite the lamp. after cathode heating, the inverter frequency drops to f min causing a high voltage to appear to ignite the lamp. if the voltage does not drop when the lamp is supposed to have ignited, the lamp voltage feedback coming into pin 9 rises to above v ref , the c x charging current is shut off and the inverter is inhibited until c x is discharged by r x to the 1.2v threshold. shutting off the inverter in this manner prevents the inverter from generating excessive heat when figure 6. typical vcc and icc waveforms when the ML4832 is started with a bleed resistor from the rectified ac line and bootstrapped from an auxiliary winding. figure 7. lamp preheat and interrupt timers functional description (continued) vccz v on v off 5.5ma 0.34ma v cc i cc t t 10 9 r x c x 6.8 + C 1.2/4.8 heat inhibit 0.625 r set + C 1.2/6.8 C + v ref dimming lockout r x /c x int q r s
ML4832 10 rev. 1.0 10/12/2000 figure 8. lamp starting and restart timing 6.8 4.8 1.2 .65 0 7.5 r x /c x heat dimming lockout int inhibit functional description (continued) the lamp fails to strike or is out of socket. typically this time is set to be fairly long by choosing a large value of r x . lfb out is ignored by the oscillator until c x reaches 6.8v threshold. the lamps are therefore driven to full power and then dimmed. the c x pin is clamped to about 7.5v. a summary of the operating frequencies in the various operating modes is shown below. operating mode operating frequency [f(max) to f(min)] preheat 2 dimming lock-out f(min) dimming control f(min) to f(max)
ML4832 rev. 1.0 10/12/2000 11 typical applications figures 9 and 10 show ballast schematics, both non- dimming and dimming. these are power-factor corrected 60w ballasts designed to operate two series connected f32t8 fluorescent lamps. both schematics, figures 9 and 10, are of previously published ml4831 circuits that have been modified for ML4832 compatibility. the value changes and component additions made for ML4832 compatibility were for different amplifier compensation, bootstrap/bias and protection and do not effect the validity of the circuit description, operational information or equations. to convert from an existing non-dimming ml4831 to the ML4832: resistors change: r4 to 51k w , 1 / 4 w, 5% carbon film r6, r7 to 866k w , 1 / 4 w, 1%, metal film r7 to 75k w , 1 / 4 w, 5%, carbon film r18 to 470 w , 1 / 4 w, 5%, carbon film r13 to 5.76k w , 1 / 4 w, 1%, metal film r14 to 499k w , 1 / 4 w, 5%, carbon film add: r24 75k w , 1 / 4 w, 5%, carbon film r22 51 w , 1 / 4 w, 5%, carbon film r23 100 w , 1 / 4 w, 5%, carbon film delete: r9 capacitors change: c5 to 10nf, 63v, 10% ceramic c7 to 180pf, 100v, 5% ceramic c11 to 1nf, 100v, 10% ceramic c12 to 100nf, 100v, 10% ceramic c18 to 100f, 16v, 20% electrolytic c20 to 100f, 25v, 20% electrolytic add: c23 33nf, 50v, 20% ceramic magnetics change: t1 to tsd-882 to convert from an existing dimming ml4831 to the ML4832: resistors change: r4 to 51k w , 1 / 4 w, 5% carbon film r6, r11 to 866k w , 1 / 4 w, 1%, metal film r7 to 75k w , 1 / 4 w, 5%, carbon film r18 to 470 w , 1 / 4 w, 5%, carbon film r13 to 5.76k w , 1 / 4 w, 1%, metal film r14 to 499k w , 1 / 4 w, 5%, carbon film r26 to 200k w , 1 / 4 w, 5%, carbon film add: r32 75k w , 1 / 4 w, 5%, carbon film r30 51 w , 1 / 4 w, 5%, carbon film r31 100 w , 1 / 4 w, 5%, carbon film delete: r9 capacitors change: c5 to 10nf, 63v, 10% ceramic c7 to 180pf, 100v, 5% ceramic c25 to 1nf, 100v, 10% ceramic c12 to 100nf, 100v, 10% ceramic c24 to 100f, 16v, 20% electrolytic c20 to 100f, 25v, 20% electrolytic add: c27 33nf, 50v, 20% ceramic c26 100nf, 100v, 10% ceramic diodes delete: d10, d13 magnetics change: t1 to tsd-882
ML4832 12 rev. 1.0 10/12/2000 figure 9. 220v non-dimming ballast c9 33nf c8 4700pf c19 r16 1k w c22 33nf r7 75k w 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 ML4832 d3 1a d1 1a d4 1a d5 1a d6 1a d2 1a hot neutral f1 l1 c2 2.2nf c1* 2.2nf c3 0.15 m f c20 100 m f d9 1a d13 0.1a t1 10 7 89 r6 866k w r11 866k w r18 470 w r23 100 w r17 51 w r19 51 w r1 1.0 w r14 499k w c12 100nf c5 10nf r4 51k w r5 15.4k w r15 324k c11 1nf c7 180pf c6 2.2nf c4 0.1 m f r10 11.5k w r21 5k w c10 47 m f r8 22 w r13 5.76k w r12 442k w r20 442k w q1 2.5a d7 1a d8 in4148 d11 in4148 d12 1a c13 10 m f c14 0.22 m f c15 0.22 m f c16 100pf q2 irf820 q3 irf820 t2 6 72 3 8 1 c17 1 m f c18 100 m f r22 51 w t3 tp4 6 7 4 3 2 1 9 8 r r y y b b c21 0.001 m f r3 9.1k w r2 1k w 220 vac tp2 tp3 tp1 tp5 r24 75k w c23 33nf *note: only one chassis ground
ML4832 rev. 1.0 10/12/2000 13 figure 10. 220v dimming ballast r27 200k w r28 20k w r24 64.9k w r22 11k w r26 200k w r3 220k w c9 15nf c8 4700pf c21 1 m f c22 0.33 m f r7 75k w 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 ML4832 d3 1a d1 1a d4 1a d5 1a d6 1a d2 1a hot neutral f1 l1 l2 c2 2.2nf c1* 2.2nf c3 0.15nf c20 100 m f d9 1a t1 10 7 89 r6 866k w r11 866k w r18 470 w r17 51 w r19 51 w r1 1.0 w r31 100 w r14 499k w c12 100nf c5 10nf r4 51k w r2 4.3k w r5 15.4k w r15 324k w c25 1nf c7 180pf c4 3.3 m f c6 2.2nf r10 11.5k w r16 10k w r25 5k w c10 47 m f r8 22 w r13 5.76k w r12 442k w r23 442k w q1 2.5a d7 1a d8 0.1a d11 0.1a d15 1a c13 10 m f c14 0.22 m f c16 100pf c15 0.22 m f q2 2.5a q3 2.5a t2 6 72 3 5 110 6 8 1 c17 1 m f c24 100 m f r30 51 t4 tp4 6 7 2 1 4 3 9 8 r r y y b b r20 10k w r29 1.3k w 220 vac d16 5.1v tp2 tp3 tp1 tp5 t5 + C + C ic1 3 8 7 1 2 5 6 r32 75k w c26 100nf 4 c27 33nf *note: only one chassis ground
ML4832 14 rev. 1.0 10/12/2000 physical dimensions inches (millimeters) seating plane 0.240 - 0.260 (6.09 - 6.61) pin 1 id 0.295 - 0.325 (7.49 - 8.26) 0.890 - 0.910 (22.60 - 23.12) 0.016 - 0.022 (0.40 - 0.56) 0.100 bsc (2.54 bsc) 0.008 - 0.012 (0.20 - 0.31) 0.015 min (0.38 min) 18 0o - 15o 1 0.050 - 0.065 (1.27 - 1.65) 0.170 max (4.32 max) 0.125 min (3.18 min) 0.045 min (1.14 min) (4 places) package: p18 18-pin pdip seating plane 0.291 - 0.301 (7.39 - 7.65) pin 1 id 0.398 - 0.412 (10.11 - 10.47) 0.449 - 0.463 (11.40 - 11.76) 0.012 - 0.020 (0.30 - 0.51) 0.050 bsc (1.27 bsc) 0.022 - 0.042 (0.56 - 1.07) 0.095 - 0.107 (2.41 - 2.72) 0.005 - 0.013 (0.13 - 0.33) 0.090 - 0.094 (2.28 - 2.39) 18 0.009 - 0.013 (0.22 - 0.33) 0o - 8o 1 0.024 - 0.034 (0.61 - 0.86) (4 places) package: s18 18-pin soic
ML4832 rev. 1.0 10/12/2000 15 ordering information part number temperature range package ML4832cp (end of life) 0c to 85c molded pdip (p18) ML4832cs (obsolete) 0c to 85c soic (s18) life support policy fairchild? products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com ?2000 fairchild semiconductor corporation disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others.

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